# Location enum
int VLOC_STCK = 2
int VLOC_LITL = 1
int VLOC_DATA = 0

# Should be -2
int32 PTYPE_NONE = 2
# Should be -1
int32 PTYPE_PTR = 1
int32 PTYPE_REF = 0
# 1 Arr is ptr to arr, larger #s are static size arrs
int32 PTYPE_ARR = 1

int PRIM_NON = 0
int PRIM_BOO = 1
int PRIM_INT = 2
int PRIM_FLT = 3

~uint8 PRIM_CSV_BOO = "bool\0"
~uint8 PRIM_CSV_INT = "int,int8,int16,int32,int64,uint,uint8,uint16,uint32,uint64\0"
~uint8 PRIM_CSV_FLT = "float,float32,float64\0"

# Should dispose of this constructed string
# 1-8 are ax, bx, cx, dx, si, di, sp, bp
# 9-16 are r8, r9, r10, r11, r12, r13, r14, r15
# 17-32 are xmm0, xmm1, xmm2, ..., xmm15
/; reg_string (int r, int size) [~uint8]
	utils.Vector out
	out.init(1)
	uint8 add

	/; if (r < 9)
		/; if (size == 4)
			add = 'e'
			out.push(~add)
		;; else if (size == 8)
			add = 'r'
			out.push(~add)
		;/

		add = 'a'       
		/; if (r < 5)
			add = add + r - 1
		;; else if (r == 5 || r == 7)
			add = 's'
		;; else if (r == 6)
			add = 'd'
		;; else if (r == 8)
			add = 'b'
		;/
		out.push(~add)

		/; if (r == 5 || r == 6)
			add = 'i'
			out.push(~add)
		;; else if (r == 7 || r == 8)
			add = 'p'
			out.push(~add)
		;; else if (size !== 1)
			add = 'x'
			out.push(~add)
		;/

		/; if (size == 1)
			add = 'l'
			out.push(~add)
		;/
	;; else if (r < 17)
		add = 'r'
		out.push(~add)

		~uint8 num = utils.int_to_str(r - 1)
		out.push_cstr(num)
		_delete(num)
		/; if (size == 1)
			add = 'b'
			out.push(~add)
		;; else if (size == 2)
			add = 'w'
			out.push(~add)
		;; else if (size  == 4)
			add = 'd'
			out.push(~add)
		;/
	;; else if (r < 33)
		out.push_cstr("xmm\0")
		~uint8 num = utils.int_to_str(r - 17)
		out.push_cstr(num)
		_delete(num)
	;/

	return out.as_cstr()
;/

struct Var {
	~uint8 name,
	~Struct _type,
	utils.Vector ptrc,
	int loc,
	
	~parse.Node _tn, _id
}

/; method Var
	# Initial init function, requires type node and
	# identifier node
	/; init (~parse.Node tn, id)
		self.name = utils.strcpy(id`.data)
		self.ptrc.init(4)
		self._tn = tn
		self._id = id
	;/

	/; _print (int idt)
		_indent(idt)
		_print("{ Var : \0")
		_print(self.name)
		_print("\n\0")
		
		~int32 ptr
		_indent(idt)
		_print(" pointer chain: \0")
		/; loop (int i = 0; i < self.ptrc.count) [i++]
			ptr = self.ptrc.get(i)
			_print_num("%d \0", ptr`)
		;/
		_print("\n\0")

		_indent(idt)
		_print(" computed type name: \0")
		/; if (self._type == NULL)
			_print("NULL\0")
		;; else
			_print(self._type`.name)
		;/
		_print("\n\0")

		_indent(idt)
		_print("}\n\0")
	;/

	/; _arr_ptr(~parse.Node a)
		int32 ptr = 1
		/; if (a`.sub.count > 0)
			~parse.Node l = a`.sub.get(0)
			ptr = utils.cstr_to_int(l`.data)
			/; if (ptr < 2)
				return
			;/
		;/
		self.ptrc.push(~ptr)
	;/

	# Sets up both the ptrc and the _type members, requires
	# parent module for resolution of types
	/; _resolve_type (~Module parent)
		int idx = 0
		bool running = true
		~parse.Node t, _tn
		_tn = self._tn

		# Pre-op pointer
		/; loop (running == true) [idx++]
			/; if (idx !< _tn`.sub.count)
				running = false
			;; else
				t = _tn`.sub.get(idx)
				/; if (t`._type == parse.NTYPE_PRE_OP)
					/; if (utils.strcmp(t`.data, "~\0") == true)
						int32 ptr = 0
						ptr = ptr - PTYPE_PTR
						self.ptrc.push(~ptr)
					;; else
						self._arr_ptr(t)
					;/
				;; else
					running = false
				;/
			;/
		;/

		# After pre-ops comes id
		utils.Vector strv
		strv.init(8)
		running = true
		/; loop (running == true) [idx++]
			/; if (idx !< _tn`.sub.count)
				running = false
			;; else
				t = _tn`.sub.get(idx)
				/; if (t`._type == parse.NTYPE_ID)
					~void str = t`.data
					strv.push(~str)
				;; else
					running = false
				;/
			;/
		;/

		# Main type resolution
		# TODO: FUNCTION POINTER
		self._type = parent`.find(SEARCH_STRUCT, ~strv)
		strv.end()

		# Post-op pointer
		running = true
		/; loop (running == true) [idx++]
			/; if (idx !< _tn`.sub.count)
				running = false
			;; else
				t = _tn`.sub.get(idx)
				/; if (t`._type == parse.NTYPE_POST_OP)
					int32 ptr = 0
					self.ptrc.push(~ptr)
				;/
			;/
		;/
	;/

	/; _static_compile (~Module parent, ~CompBuf buf)
		# TODO: 
	;/

	/; ptr [int32]
		~int32 i
		i = self.ptrc.get(self.ptrc.count - 1)
		return i`
	;/

	/; ptr_push (int32 p)
		self.ptrc.push(~p)
	;/

	/; ptr_pop
		self.ptrc.pop()
	;/

	/; is_primitive [int]
		~uint8 tn = self`._type`.name

		/; if (parse._in_csv(PRIM_CSV_BOO, tn) == true)
			return PRIM_BOO
		;; else if (parse._in_csv(PRIM_CSV_INT, tn) == true)
			return PRIM_INT
		;; else if (parse._in_csv(PRIM_CSV_FLT, tn) == true)
			return PRIM_FLT
		;/

		return PRIM_NON
	;/

	/; end
		_delete(self.name)
		self.ptrc.end()
	;/

	###################################
	# Variable manipulation functions #
	###################################

	# Generate a string which represents where the variable is in memory,
	# this string may be used to set the value of the variable with operations like "mov"
	# if "maybe_mem" is true, this might be an address like "[rsi]"
	/; gen_to (bool maybe_mem) [~uint8]
		utils.Vector out
		out.init(1)
		return out.as_cstr()
	;/

	# Generate a string which represents where the variable is in memory,
	# this string may be used to read the value of the variable with operations like "mov"
	# if "maybe_mem" is true, this might be an address like "[rsi]"
	/; gen_from (bool maybe_mem) [~uint8]
		utils.Vector out
		out.init(1)
		return out.as_cstr()
	;/

	# Returns true if the variable is stored in memory
	/; in_mem [bool]
		/; if (self.loc !> 0)
			return true
		;/
		return false
	;/

	# Set this variable to the value of a literal
	/; set_literal (~CompBuf buf, ~Var other)
	;/

	# Set this Variable to the value of other
	/; set (~CompBuf buf, ~Var other)
	;/

	/; standard_op (~CompBuf buf, ~Var other, ~uint8 op_str)
		~uint8 from_str
		~uint8 to_str = self.gen_to(true)

		/; if (self.in_mem())
			from_str = other`.gen_from(false)
		;; else
			from_str = other`.gen_from(true)
		;/

		buf`.add_c(op_str)
		buf`.add_c(" \0")
		buf`.add_c(to_str)
		buf`.add_c(", \0")
		buf`.add_c(from_str)
		buf`.add_c("\n\0")

		_delete(from_str)
		_delete(to_str)
	;/

	/; product_op (~CompBuf buf, ~Var other, ~uint8 op_str, int read_reg)

	;/

	/; add (~CompBuf buf, ~Var other)
		/; if (self.loc = VLOC_LITL)
		;/
		self.standard_op(buf, other, "add")
	;/

	/; sub (~CompBuf buf, ~Var other)
		self.standard_op(buf, other, "sub")
	;/

	/; mul (~CompBuf buf, ~Var other)
		self.product_op(buf, other, "imul", 1)
	;/

	/; div (~CompBuf buf, ~Var other)
		/; if ("signed")
			self.product_op(buf, other, "idiv", 1)
		;; else
			self.product_op(buf, other, "div", 1)
		;/
	;/

	/; mod (~CompBuf buf, ~Var other)
		/; if ("signed")
			self.product_op(buf, other, "idiv", 4)
		;; else
			self.product_op(buf, other, "div", 4)
		;/
	;/

	/; and (~CompBuf buf, ~Var other)
		self.standard_op(buf, other, "and")
	;/

	/; or (~CompBuf buf, ~Var other)
		self.standard_op(buf, other, "or")
	;/

	/; xor (~CompBuf buf, ~Var other)
		self.standard_op(buf, other, "xor")
	;/

	/; not (~CompBuf buf, ~Var other)
		self.standard_op(buf, other, "xor")
	;/

	/; member (~CompBuf buf, ~uint8 name) [Var]
		Var out
		return out
	;/
;/