diff options
author | CircleShift <kgunger12@gmail.com> | 2025-03-18 14:46:48 -0400 |
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committer | CircleShift <kgunger12@gmail.com> | 2025-03-18 14:46:48 -0400 |
commit | d20df58b6b7cbceb9b7586e974aec652d830711f (patch) | |
tree | a2f65e8d327b34f714b599b55512de585cef141d /tnslc/compile | |
parent | 2cbdfbc78805648cfa3f76bfc5e3eb80b796f581 (diff) |
[tnslc ]Register string generate funcorigin
Diffstat (limited to 'tnslc/compile')
-rw-r--r-- | tnslc/compile/codegen.tnsl | 4 | ||||
-rw-r--r-- | tnslc/compile/module.tnsl | 3 | ||||
-rw-r--r-- | tnslc/compile/var.tnsl | 221 |
3 files changed, 228 insertions, 0 deletions
diff --git a/tnslc/compile/codegen.tnsl b/tnslc/compile/codegen.tnsl index 165fe12..caaafb7 100644 --- a/tnslc/compile/codegen.tnsl +++ b/tnslc/compile/codegen.tnsl @@ -1,4 +1,8 @@ /; generate (~utils.File fin, fout) + parse.Node ast = parse.generate_ast(fin) + ast.update_children() + parse.print_ast(~ast) + ast.end() ;/ diff --git a/tnslc/compile/module.tnsl b/tnslc/compile/module.tnsl index 6dbef6c..6d1d24a 100644 --- a/tnslc/compile/module.tnsl +++ b/tnslc/compile/module.tnsl @@ -31,6 +31,9 @@ struct Module { self.e = exp ;/ + /; from_tree (~parse.Node root) + ;/ + /; end _delete(self.name) diff --git a/tnslc/compile/var.tnsl b/tnslc/compile/var.tnsl index 9526fc6..23da42b 100644 --- a/tnslc/compile/var.tnsl +++ b/tnslc/compile/var.tnsl @@ -1,4 +1,95 @@ +# Location enum +int VLOC_STCK = 2 +int VLOC_LITL = 1 +int VLOC_DATA = 0 + +int PTYPE_NONE = 2 +int PTYPE_PTR = 1 +int PTYPE_REF = 0 +int PTYPE_ARR = 1 + +int PRIM_NON = 0 +int PRIM_BOO = 1 +int PRIM_INT = 2 +int PRIM_FLT = 3 + +~uint8 PRIM_CSV_BOO = "bool\0" +~uint8 PRIM_CSV_INT = "int,int8,int16,int32,int64,uint,uint8,uint16,uint32,uint64\0" +~uint8 PRIM_CSV_FLT = "float,float32,float64\0" + +# Should dispose of this constructed string +# 1-8 are ax, bx, cx, dx, si, di, sp, bp +# 9-16 are r8, r9, r10, r11, r12, r13, r14, r15 +# 17-32 are xmm0, xmm1, xmm2, ..., xmm15 +/; reg_string (int r, int size) [~uint8] + utils.Vector out + out.init(1) + uint8 add + + /; if (r < 9) + /; if (size == 4) + add = 'e' + out.push(~add) + ;; else if (size == 8) + add = 'r' + out.push(~add) + ;/ + + add = 'a' + /; if (r < 5) + add = add + r - 1 + ;; else if (r == 5 || r == 7) + add = 's' + ;; else if (r == 6) + add = 'd' + ;; else if (r == 8) + add = 'b' + ;/ + out.push(~add) + + /; if (r == 5 || r == 6) + add = 'i' + out.push(~add) + ;; else if (r == 7 || r == 8) + add = 'p' + out.push(~add) + ;; else if (size !== 1) + add = 'x' + out.push(~add) + ;/ + + /; if (size == 1) + add = 'l' + out.push(~add) + ;/ + ;; else if (r < 17) + add = 'r' + out.push(~add) + + ~uint8 num = utils.int_to_str(r - 1) + out.push_cstr(num) + _delete(num) + /; if (size == 1) + add = 'b' + out.push(~add) + ;; else if (size == 2) + add = 'w' + out.push(~add) + ;; else if (size == 4) + add = 'd' + out.push(~add) + ;/ + ;; else if (r < 33) + out.push_cstr("xmm\0") + ~uint8 num = utils.int_to_str(r - 17) + out.push_cstr(num) + _delete(num) + ;/ + + return out.as_cstr() +;/ + struct Var { ~uint8 name, ~Struct _type, @@ -26,8 +117,138 @@ struct Var { self.ptrc.pop() ;/ + /; is_primitive [int] + ~uint8 tn = self`._type`.name + + /; if (parse._in_csv(PRIM_CSV_BOO, tn) == true) + return PRIM_BOO + ;; else if (parse._in_csv(PRIM_CSV_INT, tn) == true) + return PRIM_INT + ;; else if (parse._in_csv(PRIM_CSV_FLT, tn) == true) + return PRIM_FLT + ;/ + + return PRIM_NON + ;/ + /; end _delete(self.name) self.ptrc.end() ;/ + + ################################### + # Variable manipulation functions # + ################################### + + # Generate a string which represents where the variable is in memory, + # this string may be used to set the value of the variable with operations like "mov" + # if "maybe_mem" is true, this might be an address like "[rsi]" + /; gen_to (bool maybe_mem) [~uint8] + utils.Vector out + out.init(1) + return out.as_cstr() + ;/ + + # Generate a string which represents where the variable is in memory, + # this string may be used to read the value of the variable with operations like "mov" + # if "maybe_mem" is true, this might be an address like "[rsi]" + /; gen_from (bool maybe_mem) [~uint8] + utils.Vector out + out.init(1) + return out.as_cstr() + ;/ + + # Returns true if the variable is stored in memory + /; in_mem [bool] + /; if (self.loc !> 0) + return true + ;/ + return false + ;/ + + # Set this variable to the value of a literal + /; set_literal (~CompBuf buf, ~Var other) + ;/ + + # Set this Variable to the value of other + /; set (~CompBuf buf, ~Var other) + ;/ + + /; standard_op (~CompBuf buf, ~Var other, ~uint8 op_str) + ~uint8 from_str + ~uint8 to_str = self.gen_to(true) + + /; if (self.in_mem()) + from_str = other`.gen_from(false) + ;; else + from_str = other`.gen_from(true) + ;/ + + buf`.add_c(op_str) + buf`.add_c(" \0") + buf`.add_c(to_str) + buf`.add_c(", \0") + buf`.add_c(from_str) + buf`.add_c("\n\0") + + _delete(from_str) + _delete(to_str) + ;/ + + /; product_op (~CompBuf buf, ~Var other, ~uint8 op_str, int read_reg) + + ;/ + + /; add (~CompBuf buf, ~Var other) + /; if (self.loc = VLOC_LITL) + ;/ + self.standard_op("add") + ;/ + + /; sub (~CompBuf buf, ~Var other) + self.standard_op("sub") + ;/ + + /; mul (~CompBuf buf, ~Var other) + self.product_op(buf, other, "imul", 1) + ;/ + + /; div (~CompBuf buf, ~Var other) + /; if ("signed") + self.product_op(buf, other, "idiv", 1) + ;; else + self.product_op(buf, other, "div", 1) + ;/ + ;/ + + /; mod (~CompBuf buf, ~Var other) + /; if ("signed") + self.product_op(buf, other, "idiv", 4) + ;; else + self.product_op(buf, other, "div", 4) + ;/ + ;/ + + /; and (~CompBuf buf, ~Var other) + self.standard_op("and") + ;/ + + /; or (~CompBuf buf, ~Var other) + self.standard_op("or") + ;/ + + /; xor (~CompBuf buf, ~Var other) + self.standard_op("xor") + ;/ + + /; not (~CompBuf buf, ~Var other) + self.standard_op("xor") + ;/ + + /; member (~CompBuf buf, ~uint8 name) [Var] + Var out + return out + ;/ ;/ + + |